📚 Knowledge Library — Topic 3.2 — Hardware

The Fetch Stage

Understand how the CPU fetches the next instruction from RAM, ready for the Fetch–Decode–Execute cycle to continue.

Start LearningWorked Example
1. Invitation

The CPU needs to know what to do next.

Before the CPU can decode or execute an instruction, it must first collect it from memory.

This first step is called the fetch stage. It brings the next instruction from RAM into the CPU.

💡 Remember: fetch means get the next instruction.
Figure 1.1
Fetch Means Collect
RAM
↓
Instruction
↓
CPU
2. Big Idea

The Program Counter points to the next instruction.

The Program Counter (PC) stores the address of the next instruction to fetch.

That address is copied into the Memory Address Register (MAR), so the CPU knows where to look in RAM.

💡 PC points to the next instruction. MAR holds the address being used.
Figure 2.1
PC to MAR
PC
address 104
↓
MAR
address 104
3. FutureLogic Bridge

Think of a recipe card.

A chef follows numbered recipe cards. The chef checks which card is next, goes to that card, and brings it to the workbench.

The fetch stage works in the same way. The CPU finds the next instruction and brings it into place.

💡 Bridge: PC = next card number. RAM = recipe card file.
Figure 3.1
Recipe Card Model
Next card number
↓
Find card
↓
Bring to desk
4. Worked Example

Following the fetch flow.

The address travels to RAM. The instruction stored at that address is returned to the CPU.

The instruction first goes into the Memory Data Register (MDR), then into the Current Instruction Register (CIR).

Fetch flow

PC
MAR
RAM
MDR
CIR
PC → MAR → RAM → MDR → CIR
Figure 4.1
Instruction Journey
Address goes out
↓
Instruction comes back
↓
MDR → CIR
5. PC Increment

The PC moves to the next address.

During fetch, the PC is incremented. This means it increases so it points to the next instruction.

That way, the CPU is ready to fetch the following instruction when the cycle repeats.

Example

Before
PC = 104
Increment
+1
After
PC = 105
Figure 5.1
PC Moves On
PC = 104
+1
PC = 105
The next instruction is now ready.
6. Exam Tip

Use the correct fetch sequence.

Fetch questions often reward clear arrows and correct register names.

If asked to draw or describe the fetch stage, focus only on fetch. Do not describe decode and execute as well.

🎯 Exam Tip: PC → MAR → RAM → MDR → CIR is the core flow to remember.
Figure 6.1
Exam Flow
PC → MAR
MAR → RAM
RAM → MDR
MDR → CIR
7. Common Mistake

Do not draw the whole FDE cycle.

Students sometimes draw fetch, decode and execute when the question only asks for the fetch stage.

That wastes time and may miss the marks for the detailed fetch process.

⚠️ Common Mistake: when asked for fetch, stay focused on fetch only.
Figure 7.1
Stay Focused
Question says:
FETCH

✓

Answer only:
FETCH
8. Summary

The fetch stage in one screen.

The PC stores the address of the next instruction. This address is copied to the MAR.

The instruction is fetched from RAM, travels to the MDR, then is copied into the CIR ready for decoding.

💡 Key idea: fetch gets the next instruction ready for decode.
Figure 8.1
Fetch Summary
PC
↓
MAR
↓
RAM
↓
MDR → CIR