4.3 Interrupts Lab
Software vs hardware interrupts, priority, the interrupt handler (IH) and interrupt service routine (ISR) — plus the trap that tripped up half the June 2025 cohort: a keyboard is a device, not an interrupt.
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What do I need to know before I start?
Section 4.3 covers interrupts — the signal-based system the CPU uses to handle several demands "at once". It builds on 4.2 (managing interrupts is an OS function) and connects forward to error handling later in the course. Cambridge tests interrupts every session: 1-mark identification, 2-mark examples, and 3–4 mark descriptions of the handling sequence. The marks are won by using the exact phrases — "finishes the current fetch–decode–execute cycle", "saves the state", and "Interrupt Service Routine (ISR)" — and by never confusing a device with an interrupt.
By the end of 4.3 you can…
| Objective | Why it matters |
|---|---|
| Define an interrupt | n25 Q6b — a signal to the CPU that something needs attention. |
| Give examples of software AND hardware interrupts | s25 · textbook Q5 — you need one of each, not two of the same kind. |
| Distinguish an interrupt from a device | s25 examiner report — "keyboard" is a device; the "keypress" is the interrupt. |
| Describe the interrupt-handling sequence | 2025 P1 MS · textbook Q6 — the ordered steps from FDE cycle to resume. |
| Define and distinguish IH and ISR | n25 Q6b(ii) — the handler manages priority; the ISR performs the action. |
Cambridge-approved terms
A signal sent to the CPU from a device or software that something needs the CPU's attention.
How urgent an interrupt is. High = urgent (e.g. hardware failure); low = routine (e.g. a keypress).
Checks each interrupt's priority and organises interrupts into a priority queue.
The code that actually performs the action the interrupt requires.
Comes from a physical device — printer out of paper, keypress, disk error.
Comes from a running program — division by zero, missing file, memory access violation.
The tables you must know cold
1. The interrupt-handling sequence
| Step | What happens |
|---|---|
| 1 | The CPU finishes the current fetch–decode–execute cycle. |
| 2 | The Interrupt Handler checks the interrupt's priority against the current task. |
| 3 | If higher, the current process is halted and its state is saved to memory. |
| 4 | The Interrupt Service Routine (ISR) for that interrupt is fetched. |
| 5 | The ISR runs and performs the required action. |
| 6 | The saved state is restored and the original process resumes. |
2. Hardware vs software interrupts
| Type | Comes from | Examples |
|---|---|---|
| Hardware | A physical device | Printer out of paper, key pressed, mouse click, hard-disk error |
| Software | A running program | Division by zero, missing file, memory access violation |
Traps that cost marks every session
s25 examiner trap: the keyboard is a device. The interrupt is the keypress — the event it sends.
Too vague — partial marks. Use "finishes the current FDE cycle" and "the ISR performs the action".
The IH checks priority and manages the queue; the ISR is the code that carries out the action.
The state must be saved before the ISR and restored after, or the original process can't resume.
Only if its priority is higher than the current task; a lower-priority interrupt waits in the queue.
Software interrupts exist too — division by zero, a missing file, an illegal memory access.
Check yourself — tap to reveal
Answer in your head, then tap to see the model answer. Aim for 5 of 6 before moving to Learn.
✅ Ready for Learn?
Before moving on, make sure you can answer these without notes:
- Define an interrupt in the exact mark-scheme phrasing.
- Give one hardware and one software interrupt.
- Explain the difference between a device and an interrupt.
- Describe the interrupt-handling sequence using the key phrases.
- Distinguish the IH from the ISR.
📚 From the Textbook
A CPU is a stubborn beast — it can only execute one instruction at a time. Yet somehow, when you use a laptop, you can type an essay and listen to music and receive a message and get a low-battery warning, all at once. The trick is a system of signals called interrupts. Every time something new needs the CPU's attention — a key press, a hardware failure, a completed download — a signal is sent that says "pause what you're doing and handle this". Without interrupts, a computer would ignore everything except the one task it happened to be running when you switched it on. Interrupts are what make a modern computer feel responsive.
📢 Getting Started
Sit with your phone in front of you for one minute. Every notification banner, low-battery warning, incoming message and popup you see is triggered by an interrupt. On paper, list five different events that could interrupt your phone's CPU right now. Then decide which would be HIGH priority (needs attention immediately) and which would be LOW priority (can wait).
🌍 In Context — interrupts you meet every day
Every one of these is a real-world interrupt you already recognise:
- Low-battery warning pops up during a game (hardware, high priority)
- Text notification while you're typing (software driven, low priority)
- Printer runs out of paper mid-print (hardware, medium-high)
- New USB drive plugged in (hardware, low)
- A program tries to divide by zero (software, high)
🤔 Discussion — priority thinking
The textbook lists "hardware failure" as high priority and "data input" as low priority. Why do you think the ordering is this way round? What would go wrong if the CPU treated your keypress with the same urgency as a hardware failure? Talk it through with a partner or write your best two-sentence answer.
Ready to move on? Read the Book Notes below, then explore each concept in the Learn tab.
📚 Book Notes — Exam Focus
📖 Topic Overview
Section 4.3 covers interrupts — the signal-based system the CPU uses to handle multiple demands. This section builds on 4.2 Managing Interrupts (an OS function) and connects forward to programming — you'll meet interrupts again when we look at error handling in Topic 8. Cambridge tests interrupts every session: 1-mark identification, 2-mark examples, 3-4 mark process descriptions.
🎯 Learning Objectives — with Cambridge paper references
🔑 Key Terms — quick recall
Signal to CPU: something needs attention.
High = urgent (hardware failure). Low = routine (keypress).
Organises interrupts into a priority queue.
Runs the actions the interrupt requires.
✍️ Worked Example — Cambridge s24 style
Q: Describe how the operating system handles an interrupt. [4 marks] s24 style
Model answer (any 4 of these 6 steps score full marks):
Step 1. The CPU finishes the current fetch-decode-execute cycle. 1 mark
Step 2. The Interrupt Handler checks the interrupt's priority against the current task's priority. 1 mark
Step 3. If higher, the current process is halted and its state saved to memory. 1 mark
Step 4. The Interrupt Service Routine (ISR) for that interrupt is fetched. 1 mark
Step 5. The ISR runs and performs the required action. 1 mark
Step 6. Once the ISR finishes, the saved state is restored and the original process resumes. 1 mark
📊 Quick Knowledge Check — before you start activities
Test yourself. Click each question to reveal the answer.
✅ Ready for Activities?
When you can (a) name three software and three hardware interrupts, and (b) list the sequence in the correct order, jump to Activities → Interrupt Sequence Builder.
What is an interrupt?
An interrupt is a signal sent to the CPU to tell it that something needs its attention. The CPU cannot do everything at once — it works through instructions one at a time. Interrupts are the way the outside world (or the OS itself) can politely — or urgently — cut in and say "handle this first". Every interrupt has a priority level, and the OS decides whether to pause the current task or finish it first.
A signal
An interrupt is a signal — not a device, not a program. Just a message flagging that something needs attention.
Priorities
High-priority (hardware failure) is handled fast. Low-priority (data input) can wait in the queue.
Two helpers
IH = organises the queue by priority. ISR = actually deals with the interrupt.
🎬 Interrupt Handling Flow
Press Fire Interrupt to watch what happens when an interrupt arrives while the CPU is busy. Six steps mapped to the Cambridge 2025 mark scheme.
Running FDE
Priority?
Handle it
Software vs Hardware interrupts
Cambridge asks for examples of each — memorise at least two from each column.
| 💻 Software interrupts | 🔌 Hardware interrupts |
|---|---|
| Division by zero | Data input (keypress, mouse click) |
| Two processes try to access the same memory location | Error from hardware (printer out of paper) |
| A program requests input | Hardware failure |
| Output is required | Hard drive signals it has finished reading data |
| Data required from memory | New hardware device connected |
Priority — who goes first?
🔴 HIGH priority
Needs the CPU quickly. Examples: hardware failure, power failure, division by zero. The OS should pause the current task if it can.
🟢 LOW priority
Not urgent — can wait its turn. Examples: data input (keypress, mouse click), new USB device connected. Handled after current task finishes its FDE cycle.
How the OS decides
When an interrupt is generated it joins a queue managed by the Interrupt Handler (IH). The IH orders the queue by priority. When the CPU is ready to check for interrupts, the highest-priority interrupt in the queue is handled first.
The interrupt handling sequence — 6 steps
This is the mark-scheme-perfect way to describe what happens. Learn the order.
Step by step
1. When the CPU finishes its current FDE cycle (or before starting the next), it checks the interrupt queue.
2. It checks whether any interrupt in the queue has a higher priority than the current task.
3. If yes: it halts / stores the current process.
4. It fetches the interrupt and checks the source.
5. It calls the Interrupt Service Routine (ISR) to perform the required actions.
6. When the ISR finishes, the stored process is returned to memory — or the next higher-priority interrupt is handled. If no interrupt was higher priority in step 2, the CPU just carries on with another FDE cycle.
IH vs ISR — don't mix them up
🗂️ IH — Interrupt Handler
A program that organises interrupts into a queue based on priority. Think of the IH as the receptionist — it decides who gets seen first.
⚡ ISR — Interrupt Service Routine
A program (or sequence of instructions) that retrieves an interrupt and performs the required actions. Think of the ISR as the specialist — it actually does the work.
🎮 Activity 1 — Software or Hardware?
Read the interrupt example and pick whether it is a software or hardware interrupt.
Press New.
⭐ Activity 2 — Interrupt Sequence Builder (Signature)
Click each phrase in the correct order to build the 6-step interrupt-handling sequence. Mirrors the 2025 mark scheme wording exactly.
🎮 Activity 3 — Spot the Mistake
Each statement contains a Cambridge-style misconception. Pick the one that is WRONG.
Press New.
⏱️ Activity 4 — 60-Second Interrupt Sprint
Rapid-fire classification: is it a Software or Hardware interrupt — or Not an Interrupt at all? Includes the Jun 2025 keyboard-vs-keypress trap.
Adaptive practice
Press New.
Cambridge-style questions
Press New.
Review quiz
Press New.
Exam traps
Memory triggers
🧠 "Interrupt = please pause"
An interrupt is a polite request for the CPU to switch attention. Priority decides whether the CPU actually pauses.
🧠 "IH = Hierarchy, ISR = Services"
Handler = Hierarchy (priority queue). Service Routine = Runs the actions.
🧠 "Device is NOT interrupt"
Keyboard = device. Keypress = interrupt. Printer = device. Paper-out signal = interrupt.
🧠 "6 steps: Finish · Check · Halt · Fetch · ISR · Return"
Six one-word triggers, in order. If you can list these six words, you can build the mark-scheme answer.
Mastery Map
Checkpoints
Next up
Interrupts locked in. Next is 4.4 Programming Languages Trainer — high-level vs low-level, benefits and drawbacks (drawbacks were a Nov 2025 weakness), assembly and machine code, and which is portable.