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The Fetch Stage Explained

Follow an instruction from RAM into the CPU and understand exactly what the Program Counter, MAR, MDR and CIR do during the first stage of the Fetch–Decode–Execute cycle.

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Hardware CPU Fetch Stage IGCSE Computer Science

What Happens During the Fetch Stage?

Fetch is the first stage of the Fetch–Decode–Execute cycle.

Before the CPU can work out what an instruction means or carry it out, it first needs to collect that instruction from memory.

That sounds simple, but several CPU registers have to work together to make it happen. The easiest way to understand Fetch is not to memorise a list of register names. Instead, follow the instruction on its journey.

Fetch means: get the next instruction from RAM and bring it into the CPU ready for Decode.

Check Your Understanding 1

What is the purpose of the Fetch stage?

Check the answer

The Fetch stage gets the next instruction from RAM and brings it into the CPU ready to be decoded.

Start with the Program Counter

The Program Counter (PC) stores the address of the next instruction to fetch.

Think carefully about that wording. The Program Counter does not store the instruction itself. It stores the address that tells the CPU where the next instruction can be found.

Exam Tip: PC = address of the next instruction.

Imagine that the Program Counter currently contains:

PC = 104

This means that the CPU needs to fetch the instruction stored at memory address 104.

Step 1 — PC → MAR

The address stored in the Program Counter is copied into the Memory Address Register (MAR).

PC 104 → MAR 104

The MAR holds the address of the memory location that the CPU wants to access.

This distinction is extremely important:

Register What it holds
PC Address of the next instruction to fetch.
MAR The address currently being used to access memory.

Check Your Understanding 2

If the PC contains address 250, what value is copied into the MAR at the start of Fetch?

Reveal the answer

250. The address stored in the PC is copied into the MAR.

Step 2 — MAR → RAM

The address held in the MAR is used to locate the instruction in RAM.

RAM contains the programs and data currently being used by the computer. The CPU now knows exactly which memory location it needs because the MAR contains that address.

MAR tells memory where to look.

If the MAR contains address 104, the CPU accesses location 104 in RAM and retrieves the instruction stored there.

Step 3 — RAM → MDR

The instruction fetched from RAM is transferred into the Memory Data Register (MDR).

This is where students often confuse the MAR and MDR.

Register Remember
MAR Holds an address.
MDR Holds data or an instruction transferred to or from memory.
Memory Shortcut: MAR = address. MDR = data/instruction.

Step 4 — MDR → CIR

The instruction does not stay in the MDR. It is copied into the Current Instruction Register (CIR).

MDR → CIR

The CIR holds the current instruction being processed by the CPU.

Once the instruction has reached the CIR, the Fetch stage has done its main job. The instruction is now inside the CPU and ready for the next stage: Decode.

Exam Tip: CIR = Current Instruction Register. It holds the current instruction ready to be decoded.

Check Your Understanding 3

Which register holds the instruction immediately before it is copied into the CIR?

Reveal the answer

The MDR. The instruction travels from RAM into the MDR and is then copied into the CIR.

Put the Whole Fetch Sequence Together

We can now connect all four movements into one complete journey.

PC → MAR → RAM → MDR → CIR

Do not treat this as five random abbreviations to memorise. Each part has a reason for being there.

Stage What happens
PC Stores the address of the next instruction.
PC → MAR The address is copied into the MAR.
MAR → RAM The address is used to locate the instruction in RAM.
RAM → MDR The instruction is fetched from RAM into the MDR.
MDR → CIR The instruction is copied into the CIR ready for Decode.
PC points to it → MAR holds its address → RAM supplies it → MDR receives it → CIR holds it.

Try It Before You Reveal It

One of the best ways to learn the Fetch stage is to retrieve the sequence from memory rather than repeatedly reading it.

Fetch Sequence Challenge

Without looking back, complete this sequence:

PC → ? → RAM → ? → CIR
Reveal the missing registers
PC → MAR → RAM → MDR → CIR

The missing registers are MAR and MDR.

Register Challenge

Match each description to the correct register:

  1. Stores the address of the next instruction.
  2. Holds the address currently being used to access memory.
  3. Holds the instruction returned from memory.
  4. Holds the current instruction ready for Decode.
Check your answers
  1. PC
  2. MAR
  3. MDR
  4. CIR

What Happens to the Program Counter?

There is one more important part of the Fetch stage.

During Fetch, the Program Counter is incremented. This means its value increases so that it points towards the next instruction.

For example, imagine the PC initially contains:

PC = 104

Address 104 is copied into the MAR so that the instruction stored there can be fetched.

The PC can then be incremented:

PC = 104 → increment → PC = 105

The CPU is therefore already prepared to locate the following instruction when the Fetch–Decode–Execute cycle repeats.

Important: Incrementing the PC does not mean that the instruction has been executed. It prepares the PC to identify the next instruction.

Check Your Understanding 4

The PC contains 350 at the beginning of a simple Fetch example. If it is incremented by one, what will it contain?

Reveal the answer

351. The PC has moved on so that it can point towards the next instruction.

Address Out — Instruction Back

There is a useful way to visualise the Fetch stage without memorising every sentence.

Address goes out:
PC → MAR → RAM

Instruction comes back:
RAM → MDR → CIR

First, the CPU needs an address so it knows where to look. Then RAM returns the instruction stored at that address.

This mental model also helps explain why the MAR and MDR have different jobs.

MAR helps locate the instruction. MDR helps transfer the instruction.

Exam Focus — Describe the Fetch Stage

A strong Fetch answer uses the correct register names and describes the movement of the address and instruction in the correct order.

A clear answer could explain that:

  1. The PC stores the address of the next instruction.
  2. This address is copied into the MAR.
  3. The instruction at that address is fetched from RAM.
  4. The instruction is transferred to the MDR.
  5. It is then copied into the CIR.
  6. The PC is incremented ready for the next instruction.

The exact number of points required depends on the question, so always read the command word and the number of marks available.

Stay focused: If the question asks you to describe Fetch, describe Fetch. Do not spend the answer explaining Decode and Execute.

Common Fetch Stage Mistakes

✗ Saying the PC stores the next instruction.
The PC stores the address of the next instruction.
✗ Saying the MAR stores the instruction.
The MAR holds a memory address.
✗ Mixing up MAR and MDR.
MAR = address. MDR = data or instruction being transferred.
✗ Forgetting the CIR.
The fetched instruction is copied from the MDR into the CIR, where it is ready for Decode.
✗ Forgetting that the PC is incremented.
The PC moves on so that the CPU can locate the next instruction when the cycle repeats.
✗ Explaining Decode and Execute in a Fetch question.
Keep your answer focused on the stage the question actually asks about.

Quick Quiz

  1. What does the Program Counter store?
  2. Which register receives the address stored in the PC?
  3. Where is the instruction fetched from?
  4. Which register receives the instruction from RAM?
  5. Which register holds the current instruction ready for Decode?
  6. Write the complete Fetch sequence.
  7. What happens to the Program Counter during Fetch?
  8. What is the difference between the MAR and MDR?

Quick Quiz Answers

Reveal all answers
  1. The address of the next instruction.
  2. The MAR.
  3. RAM.
  4. The MDR.
  5. The CIR.
  6. PC → MAR → RAM → MDR → CIR.
  7. It is incremented so that it can point towards the next instruction.
  8. The MAR holds an address; the MDR holds data or an instruction being transferred to or from memory.

Final Summary

PC

Stores the address of the next instruction.

MAR

Holds the memory address currently being accessed.

RAM

Contains the instruction that the CPU needs to fetch.

MDR

Holds the instruction fetched from memory.

CIR

Holds the current instruction ready for Decode.

PC Increment

Prepares the PC for the next instruction.

PC → MAR → RAM → MDR → CIR. Understand the journey and the sequence becomes much easier to remember.

Continue Learning: Decode & Execute

The instruction has now reached the CIR. Fetch is complete. The CPU's next job is to work out what the instruction means and then carry it out.

Explore 3.2 in the Knowledge Library Next Blog: Decode & Execute Back to Blog
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Ready for the next stage?

Fetch has brought the instruction into the CPU. Now discover how the Control Unit works out what the instruction means and how the CPU carries it out.

Continue to Decode & Execute Explore the Learning Hub