The Learning Hub/Topic 3
๐Ÿ–ฅ๏ธ Topic 3

Hardware

Nine interactive trainers take you from the CPU and the fetch-decode-execute cycle through to storage and network hardware. Each one teaches the idea, lets you drill it, then tests you โ€” work through them in order or jump to the skill you need.

3.1

CPU & Von Neumann Trainer

The CPU, the Von Neumann architecture, the five registers and the three buses โ€” the foundation of every hardware question.

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3.2

Fetch-Decode-Execute Lab

Step through the FDE cycle at register level โ€” fetch, decode and execute โ€” the sequence Cambridge tests every session.

3.3

CPU Performance Trainer

How clock speed, cores and cache affect performance โ€” with the exact wording each factor needs in the exam.

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3.4

Embedded Systems Trainer

Embedded vs general-purpose, the microprocessor, and the Internet of Things โ€” and how to explain why a device is embedded.

TrainerStart
3.5

Input & Output Devices Trainer

Input, output and sensors โ€” plus the automated system sequence from sensor to actuator that examiners mark step by step.

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3.6

Primary Storage Trainer

RAM vs ROM, volatile vs non-volatile, and what each stores โ€” the quick marks the CPU accesses directly.

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3.7

Secondary Storage Trainer

Magnetic, optical and solid-state โ€” how each stores data, real examples, and the traps that cost marks every session.

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3.8

Virtual Memory & Cloud Storage

How virtual memory extends RAM with paging, plus cloud storage and its advantages and disadvantages.

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3.9

Network Hardware Trainer

NIC, MAC address and IP addresses โ€” IPv4 vs IPv6, static vs dynamic, and how a router forwards packets.

TrainerStart
๐Ÿ“š Want the written theory too? Read the Topic 3 lessons in the Knowledge Library, then come back to train.