CPU & Von Neumann Trainer
The CPU, the Von Neumann architecture, the five registers and the three buses โ the foundation of every hardware question.
Nine interactive trainers take you from the CPU and the fetch-decode-execute cycle through to storage and network hardware. Each one teaches the idea, lets you drill it, then tests you โ work through them in order or jump to the skill you need.
The CPU, the Von Neumann architecture, the five registers and the three buses โ the foundation of every hardware question.
Step through the FDE cycle at register level โ fetch, decode and execute โ the sequence Cambridge tests every session.
How clock speed, cores and cache affect performance โ with the exact wording each factor needs in the exam.
Embedded vs general-purpose, the microprocessor, and the Internet of Things โ and how to explain why a device is embedded.
Input, output and sensors โ plus the automated system sequence from sensor to actuator that examiners mark step by step.
RAM vs ROM, volatile vs non-volatile, and what each stores โ the quick marks the CPU accesses directly.
Magnetic, optical and solid-state โ how each stores data, real examples, and the traps that cost marks every session.
How virtual memory extends RAM with paging, plus cloud storage and its advantages and disadvantages.
NIC, MAC address and IP addresses โ IPv4 vs IPv6, static vs dynamic, and how a router forwards packets.